Certificate Programme in Digital VLSI Design Programme by CEP

Programme Overview

Unlock the potential of digital VLSI design with our advanced certification course. Dive deep into RTL design, synthesis, and testing while gaining hands-on experience with industry-standard tools. Led by experts from IIT Delhi's Centre for Applied Research in Electronics, this programme equips you with the skills to excel in the blooming semiconductor industry.

Programme Highlights

You Will Learn

Industry-Led Pedagogy

Certification from CEP, IIT Delhi

Learn from top faculty in VLSI Design

3 Days Campus Immersion

Real-world Case Studies

Industries Visits/Interactions with the Leaders

Networking Opportunities during Campus Immersion

Master design principles: Logic synthesis, timing analysis, physical design

Use VLSI design software: Design, simulate, verify circuits

Apply advanced techniques: Low-power, high-speed, DFT

Analyze and optimize: Performance, area, power consumption

Collaborate in teams: Solve real-world design challenges

Assignments

Simulations tools

Projects

Case Studies

Live Online Sessions via (D2D)

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Programme Content

MODULE 1: Digital IC Design

CMOS ASIC Design Flow

The MOSFET Device

The Interconnects

The CMOS Inverter

Inverter Delays and Power Dissipation

The Combinational Logic Gates

The Sequential Logic Gates

Module 2: Digital Circuit and RTL Design

Circuit Simulations using LTspice

Digital Circuit Design Example

Low-Power CMOS Circuit Design

RTL Design using Verilog HDL

RTL Verification and Finite State Machines (FSM)

Capstone Project in Verilog Design & Synthesis

Module 3: Physical Design

Floor-Plan

Placement

Static Timing Analysis

Clock Tree Synthesis and Signal Integrity

Routing and DRC

Layout Parasitic Extraction

Advanced Floor planning and Placement Strategies

Clock Tree Synthesis and Advanced Timing Analysis

Signal Integrity and Electromigration Challenges

Module 4: AI/ML Hardware Accelerations

Hardware architectures for AI/ML

Neural network accelerator design

Tensor processing unit fundamentals

Hardware-software co-design for AI applications

Optimization techniques for ML hardware

Edge computing architectures

Security hardware implementation

AI based VLSI Design (CAD)

Module 5: Industry Specific Applications

Post Silicon Chip Validation

Chip Integration and Packaging

Introduction to 3D IC Design and Chiplet Architectures

Automotive IC design considerations

IoT chip design

5G/6G communication hardware

Module 6: Scripting for VLSI Professionals

UNIX Environment

Basic Linux Commands

Shell-Scripting

Introduction to PERL Programming

PERL Programming

Argument Parsing, Loops and Functions

File Handling

Regular Expressions in PERL

Lab Module

24 hours of Lab module is planned in the programme.

Labs will be conducted online. Various projects and hands-on training will be provided during lab hours.

Tools

Circuit Simulation Tool: LTSpice

Verilog Simulation Tool: ModelSim

FPGA/RTL Design Tool: Xilinx Vivaldo

FPGA Development Tool: Quartus Prime Lite

Operating System and Languages: Linux/Tcl

Projects

Some of the projects planned are given below:

Project 1:Combinational and Sequential CMOS Circuit Design

Project 2: CMOS Low Power I/O Circuit Design

Project 3: Power Management IC (PMIC) Design

Project 4: Clock Tree Synthesis and Static Timing Analysis

Project 5: Design for Test (DFT) and Automatic Test Pattern Generation (ATPG)

Note: This is an indicative list of course topics and is subject to change as per IIT Delhi’s discretion.

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Admission Fee & Financing

Easy EMI Options Available

Pay in easy monthly installments with our EMI options. No more worrying about finances; start your learning journey today!

Complete Payment

Participants can make one-time payment easily using options such as:

Internet Banking

Credit/Debit Card

INR 1,20,000/-
+ GST

Eligibility

Eligibilty Criteria

Screening & Selection

Assessment

Attendance

Any Electronics, Electrical, Physics or Computer Science Graduate.
Candidates pursuing the graduation degree are also eligible however preference will be given to applicants with experience.
Diploma holders (10 + 3) or (10 + 2 + 3) are also eligible.

Screening and selection will be done by IIT Delhi.

60% - End of programme MCQ-based exam
40% - Assignments & project
10% - Attendance (Grace)
Candidates need to secure a minimum of 50% overall to be eligible for the certificate.

Minimum of 50% attendance is mandatory.

Our Facilitators

Prof. Samaresh Das (Coordinator)

Professor & Head,
Centre for Applied Research in Electronics

Prof. Ankur Gupta

Associate Professor,
Centre for Applied Research in Electronics

Prof. Rahul Mishra

Associate Professor,
Centre for Applied Research in Electronics

Prof. Pushparaj Singh

Associate Professor,
Centre for Applied Research in Electronics

Programme Certification

Candidates who score at least 50% marks overall and have a minimum attendance of 50% will receive a ‘Certificate of Completion’ from CEP, IIT Delhi.
Participants who are unable to score 50% marks in the evaluation but maintain a minimum attendance of 50% will be eligible for the ‘Participation Certificate’ from CEP, IIT Delhi.

The above e-certificate is for illustrative purposes only and the format of the certificate may be changed at the discretion of IIT Delhi.
Only e-certificate will be provided and it will be issued by CEP, IIT Delhi.
The organizing department of this programme is the Centre for Applied Research in Electronics (CARE) at IIT Delhi.

Certificate Programme in Digital VLSI Design
Programme by CEP, IIT Delhi

Gain practical experience with CAD tools and HDLs, preparing you for lucrative opportunities in semiconductor companies. Don't miss out – register today and take the next step in your career. Secure your future in digital VLSI now!

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Certificate Programme in Digital VLSI Design
Programme by CEP, IIT Delhi

Batch 02

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Programme Overview